1. Field of the Invention
The present invention relates to a method of forming metal wirings for high voltage elements, and more specifically, to a method of forming metal wirings of a semiconductor device for a high voltage power.
2. Discussion of Related Art
Recently, as semiconductor devices are gradually higher integrated and becoming high density, copper (Cu) having low resistance has been used in a metal wiring, which is formed by means of a damascene process. That is, the copper wirings is formed by depositing an interlayer insulating film, patterning the interlayer insulating film to fill the copper metal in an electroplating mode, and then polishing the copper metal.
However, in a metal wiring for a high voltage power, the pattern density of copper exceeds about 90% or more. Therefore, the space of the metal wiring is very narrower than that of an existing copper wirings. If existing damascene techniques are employed, the amount of etching in an oxide film becomes very high since the space between coppers is very narrow. Even upon etching, it becomes difficult to secure the space. Furthermore, even in a polishing process, there is a problem in that copper is seriously eroded in a chemical mechanical polishing (CMP) process because the pattern density of copper is high.